Analysis of Resistor Values for SerialUPDI USB<->USART Serial Programming

As I was completing a hand-wired prototype using the AVR128DB28 I became curious about the electric interface for UPDI using the SerialUPDI 4.7K programming method of programming AVR-DB MCUs (see: https://github.com/SpenceKonde/AVR-Guidance/blob/master/UPDI/jtag2updi.md ).  That interface includes a 470 current limiting resistor in series with the UPDI pin to avoid high currents if the UDPI cable was plugged in backwards or some other connection error took place (unfortunately, this not an infrequent event on my workbench).  I wondered if the resistor value could be increased to 1K to provide further current limiting.  I think the answer is yes, if a Schottky diode is added to the mix.

What follows is an explanation of why I arrived at the conclusion stated above.

The basic interface circuit is shown in Figure 1 below.

Assumptions

The USB<->UART interface shown in Figure 1 is intended to represent a generic USB<->UART module often found at places like ebay.  The USB<->UART IC on a specific module could be CP2102, CH340, FTDI, etc, but the min/max voltage levels shown in Figure 1 are for the CP2102, a discontinued but commonly found device on these modules.

From what I can discern from section 37.2 of the AVR128DB28 data sheet, the UPDI interface on the MCU is a special form of a UART operating in one-wire communications mode.  Then from 27.3.1 of the data sheet, when the standard USART (which may nor may not accurately describe the one-wire UART used by the UPDI) enters one-wire mode, the following occur:

1. Internally connect the TXD to the USART.
2. Enable internal pull-up for the RX/TX pin.
3. Enable Open-Drain mode.

Additionally, in section 39.4.4 the stated pull up current is typically 140uA with VDD at 3.0V when the pin is connected to ground.  Which leads to the question: Is that pull-up more like a resistance to VDD or more like a constant current source from VDD?  Empirical measurements from one device operating a 3.3V indicate that the pull-up behaves like a 21K resistor to VDD.[1]

So based on that, I’m assuming that the UPDI UART has the same electrical I/O characteristics as the standard USART when operating in one-wire communications mode.  The primary takeaways are that the target UPDI output is open-drain and that the pull-up current is about 140 uA.

Analysis

Let’s first discuss some global issues regarding common ebay USB<->UART modules.  First is the common inclusion of R3 with a non-zero value.  R3 appears to be included on some modules as a current limiting device for those cases when there is a VDD mismatch between the USB<->UART module and the target MCU.  Some modules have no resistor (meaning it’s as though the value of R3 was zero) while others have values as high as 1.5 K ohms.  R3 is not needed in this application as R2 will provide the needed current limiting.  If you are using module with a non-zero value of R3 you are welcome to retain it, or short it out.  But for the analysis below I’m going to assume that the value of R3 is zero.

The second module issue is caused by the status LEDs.  When current flows through DS1, the TX indicator, that current is sunk to ground by the TX output of the USB<->UART IC, thereby raising (at least slightly) at the that TX output.  That may become problematic, as we will see later.  When current flows through DS2, the RX indicators, due to the target causing the UPDI output to go low, that current will also pass through R1, increasing the voltage rise from A to B, and thus reducing voltage threshold margin at the USB<->UART RX buffer input.  So for the analysis below I will remove DS1 and DS2 so that the currents due to these devices can be ignored. (I also physically remove the TX and RX LEDs from any USB<->UART modules in my possession).

With that complete, we will now examine voltage levels from the target UPDI output to the USB<->UART RX input.  The output low voltage spec in the DB28 data sheet is 0.6 volts, but that’s when  sinking 10 mA.  We are likely to find that for programming via UPDI the UPDI pin will be sinking less than 1 mA, so the max low output voltage of 0.6V is probably far higher than found in practice.  I will adjust that value (arbitrarily) to 0.3 VDC because of the low current involved.

When the target outputs a LOW via the UPDI open-drain driver, the current provided by the MCU UPDI pull-up passes through the open-drain driver with insignificant contribution voltage rise at point A (the UPDI pin).  However, with the USB<->UART TX output idling at high, current flows from the TX output through R2 and R1 to the low UPDI pin.  The current passing through R1 produces a voltage rise from A to B.  The amount of the rise is equal to the current through R1 times the value of R1.  Clearly, as R1 increases in value the voltage rise from A to B increases.  Assuming that both the USB<->UART and target MCU are operating at 3 VDC, and that the output low voltage on UPDI is the maximum value of 0.3 volts, the current through R1 is calculated to be 580 uA  [ (3.3 – 0.3) / (470 + 4700) ].  580 uA passing through a 470 ohm resistor produces 273 mV across the resistor.  Adding 273mV to the assumed low output voltage of 0.3 volts on UPDI, that causes 574 mV to appear at the RX input on the USB<->UART IC.  This is provides 255 mV of margin relative to the VinputLOWmax value of the CP2102 of 0.8 volts (assuming my reducing the TX output low voltage max from 0.6 to 0.3 volts represents actual device characteristics).

Let’s now redo the analysis with R1 having a value of 1K ohms.  Current through R1 and R2 is calculated as 526 uA  [ (3.3 – 0.3) / (1000 + 4700) ].   526 uA passing through a 1000 ohm resistor produces a voltage of 526 mV across the resistor.  Adding 526 mV to the assumed low output voltage of 0.3 volts on UPDI, causes 826 mV to appear at the RX input on the USB<->UART IC.  This exceeds the threshold by 26 mV relative to the VinputLOWmax value of the CP2102 of 0.8 volts.

Given that R1 of 470 ohms provides 255 mV of margin, and R1 of 1000 ohms provides exceed threshold limits, 470 ohms looks like the better choice.

But what about simply increasing the value of R2 to be something higher than 4700 ohms, so there would be less current through (and less voltage across) R1?  Two things happen when the value of R1 is increased.  First, the rise time of the UPDI signal becomes longer, because the effective pull up resistance is provided by R2 and not the pull up current source internal to the MCU.  Second, the value of R2 plus R1 working against the MCU internal pull up current source form a voltage divider that reduces the margin for the VinLOWmax voltage value of the UPDI input.  Let’s look at that it be more in detail.

When the UPDI open drain driver is off, it is in a high impedance state and does not conduct current to ground.  When the TX output of the USB<->UART IC goes low, then typically (could be more!) 140 uA flows out of the UPDI pin due to the internal pull-up and then through R1 and R2 to near ground at the TX output of the USB<->UART IC (the CP2102 data sheet guarantees that the output voltage will be no higher than 0.6 volts, but I previously reduced that to 0.3 volts).  So with 140 uA flowing through R1 and R2, and if the values of those resistors were 470 and 4.7K respectively, and the TX output of the USB<->UART was 0.3 volts, then the value of voltage at A (UPDI pin) would be 1.02 volts  [ 0.3 + (0.000140 * (470+4700) )].  Woops!  The MCU data sheet for UPDI input says that the maximum low voltage input is 0.8 volts.  If we recalculate and assume that the TX output of the USB<->UART in the low state is no greater than 0 volts then the UPDI low input voltage would be 724 mV, just barely squeaking under the max input low voltage value for UPDI[2].  Clearly, if the value of R2 was increased from 4.7K to 10K the voltage at the UPDI pin when the TX output of the USB<->UART was zero, would greatly exceed the 0.8 volt input low threshold limit for UPDI.

From the analysis above, it looks to me like the recommended values for R1 (470 ohms) and R2 (4.7K ohms) are the optimum values.

However, let’s consider what happens if a Schottky diode (much lower forward voltage than a silicon diode) is added in parallel to R2 (cathode toward the TX output pin of the USB<->USART module).

Now, with this Schottky diode (D1) in place (see Figure 2 above), let’s re-exam what happens when the USB<->UART TX output goes low.  When TX output is low, 140 uA flows out of the UPDI pin due to the internal MCU pull-up and then through R1 and R2-D1 to near ground at the TX output of the USB<->UART (D).  When the 140 uA hits the parallel combination of R2 and D1, D1 clamps the voltage across R2 at approximately 160 mV (from table 2 in note 3).  In this case, assuming that the TX output of the USB<->UART was 0.3 volts, then the value of voltage at A (UPDI pin) would be 526 mV  [ 0.3 + 0.160 + (0.000140 * 470 )].  The MCU data sheet for UPDI input says that the maximum low voltage input is 0.8 volts.  So now with no favorable adjustment to the maximum UPDI input voltage, we have 274 mV of margin relative to a 0.8V limit.  Let’s recalculate again assuming that R1 is 1000 ohms.  In that case the voltage at A (UPDI pin) would be 600 mV [ 0.3 + 0.160 + (0.000140 * 1000 )], providing 200 mV of margin.  Let’s recalculate again assuming that R1 is 2200 ohms.  In that case the voltage at A (UPDI pin) would be 768 mV [ 0.3 + 0.160 + (0.000140 * 2200 )], providing 32 mV of margin (some, but not much as with 1000 ohms or 470 ohms).

Conclusion

Based on these data it would appear that the addition of a 1N5819 (or similar) Schottky diode in parallel with R2 (cathode toward USB<->UART IC) would allow the value of R1 to be safely be increased from 470 ohms to 2200 ohms while still providing adequate margin for the UPDI voltage input low maximum value.

Notes

[1] To determine the V/I characteristics of the UPDI port pullup, resistors of various values were connected from UPDI to ground and the voltage across the resistor measured.  From those data the current flowing out of the UPDI pin was calculated (V/R).  Then the values of V and I were plotted on the X and Y axis respectively in Figure 3 below, and the slope of the plotted curve was very close to a straight line with a slope of 21300 (ohms).

Figure 3 – Plot of UPDI Output Current vs. UPDI Voltage

The data measured using the actual device (sample of one at 22C) was recorded as listed in Table 1 below.

As a double check, a calculation on paper was made for two resistors connected in series: one resistor being 21300 ohms (Rpu – simulating the internal pull up resistance) and the other a resistor of value Rx (from the table above).  The uncommitted end of Rpu was then connected to the positive terminal of a 3.3V source and the uncommitted end of Rx was connected to the negative terminal of that same 3.3V source.  As Rx was stepped through the RX column of values of the table above, the calculated voltage across Rx and the calculated current through Rx are an extremely close fit to the actual values measured at the UPDI pin of the actual device (values in the table above).

[2] All in all, these values may not meet voltage threshold margins of the devices involved over the full temperature and voltage range.    But for typically supply voltages and at room temperature, I suspect that the various thresholds provide a fair bit of more margin than the various data sheets indicate.  For maker and hobbyist purposes,  the USB<->UART module with 4.7K resistor should work fine. 

[3] Schottky diodes such as the 1N5819 are intended for power applications and do not have well documented V/I characterizes at low currents (less than 100 mA).  So I did some measurements of forward voltage and reverse currents of *one* 1N5819 Schottky diode at voltages and currents commonly found in MCU control circuits (keep in mind that it’s a sample of one, at 22C).  My meter was an HP 3466A bench DMV, with an input resistance of about 10M ohms. The equivalent “resistance” (V/I) of a forward biased diode is very low, even at micro-amperes, so the reduction in forward voltage across the diode due to shunting of the meter resistance is in the range of 1 to 2 mV. The results the measurements are shown in Table 2 below.

• V-reverse  I-reverse
• ---------  ---------
•  5.0 V      0.67 uA
• 10.0 V      0.94 uA
• 15.0 V      1.24 uA
• 20.0 V      1.58 uA

Table 3 – 1N5819 Reverse Diode Current vs Reverse Diode Voltage

—ooOoo—